Part of the Day · 2026-10-23
A serial-in → parallel-out shift register that gives you 8 outputs from 3 wires (data, clock, latch). Several can be daisy-chained to drive many LEDs or 7-segment displays. The TI SOIC-16 (D) part is marked HC595.
Actual size
↓ Actual size, left edge aligned to 0 on the ruler
One ruler tick = 1mm. On PC this is actual size on a 24-inch FHD monitor at 100% zoom; on iPhone it adjusts automatically. For other screens, use “Calibrate ruler” below.
Enlarged (SOIC-16 · top view · approx. 10×)
Pins 1 QB · 2 QC · 3 QD · 4 QE · 5 QF · 6 QG · 7 QH · 8 GND · 9 QH′ (serial output, to the next chip) · 10 SRCLR (shift register clear, Low) · 11 SRCLK (shift clock) · 12 RCLK (storage clock / latch) · 13 OE (output enable, Low) · 14 SER (serial data input) · 15 QA · 16 VCC
Package SOIC-16 · Marking HC595
| Type | 8-bit shift register + 8-bit storage register (latch) |
| Package | SOIC-16 (D, 9.90 × 3.90mm) |
| Supply voltage VCC | 2 ~ 6V |
| Outputs | 3-state outputs, drive 15 LSTTL loads |
| Output current | ±6mA (5V) |
| Clock frequency | max 25MHz (VCC 4.5V, SN74HC595 over full temperature) |
| Propagation delay tpd | typ. 13ns |
| Supply current ICC | max 80µA |
Values are from the Texas Instruments datasheet.
Marking code HC595 · Pins 1 QB · 2 QC · 3 QD · 4 QE · 5 QF · 6 QG · 7 QH · 8 GND · 9 QH′ (serial output, to the next chip) · 10 SRCLR (shift register clear, Low) · 11 SRCLK (shift clock) · 12 RCLK (storage clock / latch) · 13 OE (output enable, Low) · 14 SER (serial data input) · 15 QA · 16 VCC
When OE (pin 13) is High, all 8 outputs are disconnected (high impedance). To keep them always enabled, connect it to GND. The datasheet says unused inputs must be tied to VCC or GND (SRCLR, pin 10, clears on Low, so tie it to VCC).
| ▲ Next | Part of the Day · MAX485 — SOIC-8 RS-485 transceiver |
|---|---|
| ▼ Previous | Part of the Day · TL431 — SOT-23 adjustable shunt regulator |